Laboratory Notes: Making Better Use of Time in Mixed-Signal Circuits

Michael H. Perrott
Microsystems Technology Laboratories

Gordon Moore rightly predicted some 40 years ago that the number of transistors on an integrated circuit (IC) for minimum component cost would double roughly every two years as the IC industry progressed. Since then, as “Moore’s Law” has steadily maintained its course, we have seen the introduction of ever more advanced digital processors, which has led to smaller and more powerful computers, data network components, and communication devices.

Unfortunately, as we look forward, the design of future ICs is now facing significant challenges in the implementation of analog circuit blocks which are required to interface “real-world” signals, such as voice and video content, to the digital processors that operate on such signals. The key issue at stake is that Moore’s Law favors digital circuits much more than their analog counterparts.

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Time-signal circuits: (a) a highly digital TDC structure achieving first order shaping of quantization noise, (b) a one opamp ADC leveraging VCO-based quantization for improved performance.\

Indeed, while digital circuits will enjoy denser implementation and somewhat improved speed as we move forward, analog circuits will suffer as key transistor device characteristics are steadily degraded with each new process introduction. As a response to this trend, our group is investigating new ways of leveraging digital circuits to achieve analog processing of signals. In particular, they have been pursuing improved techniques for using “time” as a continuous-valued signal domain for performing such analog operations.

Two of the most recent developments in our group have been the introduction of a new “time-to-digital converter” (TDC) structure and the demonstration of an analog-todigital converter (ADC) architecture that makes use of a voltage-controlled oscillator (VCO) for its quantizer. The proposed TDC is unique in that it offers noise shaping of its quantization noise with a highly digital implementation based on a gated ring oscillator structure.

The first application of this new building block has been a highly digital clock multiplier for digital processors that achieves sub-picosecond jitter performance, as recently presented at the VLSI 2007 conference. At the same conference, Prof. Perrott’s group also demonstrated an ADC circuit that leverages a VCO-based quantizer to achieve 11-bits of resolution with 20 MHz of bandwidth with low power, area, and minimal analog complexity in its implementation. In each of the above approaches, it was shown that “time-based signaling” allows high-performance analog processing to be achieved with highly digital circuit implementations.

Such examples offer encouragement to analog designers who seek to better leverage Moore’s Law as it continues to march forward.

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